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=== POWER2-based ===
=== POWER2-based ===


{|class="wikitable" style=text-align:center
{| class="wikitable" style="text-align: center;"
|-
|-
!width=120|Model
! width=120 | Model
!width=100|# of CPUs
! width=100 | # of CPUs
!width=100|CPU
! width=100 | CPU
!width=100|CPU MHz
! width=100 | CPU MHz
!width=100|Cache
! width=100 | L2 Cache
!width=100|Memory
! width=100 | Memory
!width=100|Introduced
! width=100 | Introduced
!width=100|Discontinued
! width=100 | Discontinued
|-
|-
|'''Thin 1'''
| '''Thin 1'''
| rowspan="4" | 1
|1
|[[POWER2]]
| rowspan="4" | [[POWER2]]
| rowspan="3" | 66
|66
|?
| ?
|64 to 512 MB
| 64 to 512 MB
| rowspan="4" | 1995-08-22
⚫
|?
|1996-12-20
| 1996-12-20
|-
|-
|'''Thin 2'''
| '''Thin 2'''
|1
| ?
⚫
| ?
|POWER2
⚫
| 1997-06-27
|66
⚫
|?
|?
|?
⚫
|1997-06-27
|-
|-
|'''Wide 1'''
| '''Wide 1'''
|1
| ?
⚫
| 64 MB to 2 GB
|POWER2
⚫
| 1996-12-20
|66
|?
⚫
|64 MB to 2 GB
|?
⚫
|1996-12-20
|-
|-
|'''Wide 2'''
| '''Wide 2'''
|1
| 77
⚫
| ?
|POWER2
|77
| ?
⚫
| 1997-06-27
|?
|?
|?
⚫
|1997-06-27
|-
|-
|}
|}

Revision as of 09:03, 29 May 2009

POWER, PowerPC, and Power ISA architectures
NXP (formerly Freescale and Motorola)
IBM
IBM/Nintendo
Other
Related links
Cancelled in gray, historic in italic

Scalable POWERparallel or SP is an IBM supercomputer platform. The nodes are based on the RS/6000 with clustering software called PSSP which is mainly written in Perl. Some of the technologies developed include the High Performance Switch (HPS) for internode communication.

Nodes

POWER1-based

Model # of CPUs CPU CPU MHz Cache Memory Introduced Discontinued
SP1 1 POWER1++ 62.5 None 64 to 256 MB 1993-02-02 1994-12-16

POWER2-based

Model # of CPUs CPU CPU MHz L2 Cache Memory Introduced Discontinued
Thin 1 1 POWER2 66 ? 64 to 512 MB 1995-08-22 1996-12-20
Thin 2 ? ? 1997-06-27
Wide 1 ? 64 MB to 2 GB 1996-12-20
Wide 2 77 ? ? 1997-06-27

PowerPC 604-based

Model # of CPUs CPU CPU MHz Cache Memory Introduced Discontinued
High 1 2, 4, 6, 8 PowerPC 604 112 ? ? ? 1998-01-08
High 2 2, 4, 6, 8 PowerPC 604e 200 ? ? ? 1998-04-21
332 Thin 2, 4 PowerPC 604e 332 ? ? ? 2000-12-29
332 Wide 2, 4 PowerPC 604e 332 ? ? ? 2000-12-29

P2SC-based

Model # of CPUs CPU CPU MHz Cache Memory Introduced Discontinued
160 Thin 1 P2SC 160 ? ? ? 1998-04-21
Thin P2SC 1 P2SC 120 ? ? ? 1998-04-21
Wide P2SC 1 P2SC 135 ? ? ? 1998-04-21

POWER3-based

Model # of CPUs CPU CPU MHz Cache Memory Introduced Discontinued
POWER3 High 2, 4, 6, 8 POWER3 222 ? ? ? 2000-12-29
POWER3 High 2, 4, 6, 8 POWER3-II 375 ? ? ? 2002-12-27
POWER3 Thin 1, 2 POWER3 200 ? ? ? 2000-06-30
POWER3 Thin 2, 4 POWER3-II 375 ? ? ? 2003-04-08
POWER3 Thin 2, 4 POWER3-II 450 ? ? ? 2003-04-08
POWER3 Wide 1, 2 POWER3 200 ? ? ? 2000-06-30
POWER3 Wide 2, 4 POWER3-II 375 ? ? ? 2003-04-08
POWER3 Wide 2, 4 POWER3-II 450 ? ? ? 2003-04-08

See also

Architecture overview

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